using CircuitSim
circ = Circuit()
port1 = ACPowerSource("P1", port_num=1, impedance=50.0)
port2 = ACPowerSource("P2", port_num=2, impedance=50.0)
add_component!(circ, port1)
add_component!(circ, port2)
PS = PhaseShifter("PS1", phase=90.0)
add_component!(circ, PS)
gnd = Ground("GND")
add_component!(circ, gnd)
@connect circ port1.nplus PS.n1
@connect circ PS.n2 port2.nplus
@connect circ port1.nminus gnd
@connect circ port2.nminus gnd
sparam = SParameterAnalysis(start=1e9, stop=10e9, points=100,
sweep_type="linear",
z0=50.0
)
result = simulate_qucsator(circ, sparam)
SParameterResult([1.0e9, 1.090909090909091e9, 1.1818181818181818e9, 1.2727272727272727e9, 1.3636363636363635e9, 1.4545454545454545e9, 1.5454545454545455e9, 1.6363636363636365e9, 1.7272727272727273e9, 1.818181818181818e9 … 9.181818181818182e9, 9.272727272727272e9, 9.363636363636364e9, 9.454545454545454e9, 9.545454545454544e9, 9.636363636363636e9, 9.727272727272728e9, 9.818181818181818e9, 9.909090909090908e9, 1.0e10], 2, Dict{Tuple{Int64, Int64}, Vector{ComplexF64}}((1, 2) => [6.123233995736766e-17 + 1.0im, 6.123233995736766e-17 + 1.0im, 6.123233995736766e-17 + 1.0im, 6.123233995736766e-17 + 1.0im, 6.123233995736766e-17 + 1.0im, 6.123233995736766e-17 + 1.0im, 6.123233995736766e-17 + 1.0im, 6.123233995736766e-17 + 1.0im, 6.123233995736766e-17 + 1.0im, 6.123233995736766e-17 + 1.0im … 6.123233995736766e-17 + 1.0im, 6.123233995736766e-17 + 1.0im, 6.123233995736766e-17 + 1.0im, 6.123233995736766e-17 + 1.0im, 6.123233995736766e-17 + 1.0im, 6.123233995736766e-17 + 1.0im, 6.123233995736766e-17 + 1.0im, 6.123233995736766e-17 + 1.0im, 6.123233995736766e-17 + 1.0im, 6.123233995736766e-17 + 1.0im], (1, 1) => [0.0 + 0.0im, 0.0 + 0.0im, 0.0 + 0.0im, 0.0 + 0.0im, 0.0 + 0.0im, 0.0 + 0.0im, 0.0 + 0.0im, 0.0 + 0.0im, 0.0 + 0.0im, 0.0 + 0.0im … 0.0 + 0.0im, 0.0 + 0.0im, 0.0 + 0.0im, 0.0 + 0.0im, 0.0 + 0.0im, 0.0 + 0.0im, 0.0 + 0.0im, 0.0 + 0.0im, 0.0 + 0.0im, 0.0 + 0.0im], (2, 2) => [0.0 + 0.0im, 0.0 + 0.0im, 0.0 + 0.0im, 0.0 + 0.0im, 0.0 + 0.0im, 0.0 + 0.0im, 0.0 + 0.0im, 0.0 + 0.0im, 0.0 + 0.0im, 0.0 + 0.0im … 0.0 + 0.0im, 0.0 + 0.0im, 0.0 + 0.0im, 0.0 + 0.0im, 0.0 + 0.0im, 0.0 + 0.0im, 0.0 + 0.0im, 0.0 + 0.0im, 0.0 + 0.0im, 0.0 + 0.0im], (2, 1) => [6.123233995736766e-17 + 1.0im, 6.123233995736766e-17 + 1.0im, 6.123233995736766e-17 + 1.0im, 6.123233995736766e-17 + 1.0im, 6.123233995736766e-17 + 1.0im, 6.123233995736766e-17 + 1.0im, 6.123233995736766e-17 + 1.0im, 6.123233995736766e-17 + 1.0im, 6.123233995736766e-17 + 1.0im, 6.123233995736766e-17 + 1.0im … 6.123233995736766e-17 + 1.0im, 6.123233995736766e-17 + 1.0im, 6.123233995736766e-17 + 1.0im, 6.123233995736766e-17 + 1.0im, 6.123233995736766e-17 + 1.0im, 6.123233995736766e-17 + 1.0im, 6.123233995736766e-17 + 1.0im, 6.123233995736766e-17 + 1.0im, 6.123233995736766e-17 + 1.0im, 6.123233995736766e-17 + 1.0im]), 50.0, nothing, nothing, nothing, nothing)